Technical Field
Embodiments of the present disclosure relate to memory devices. More specifically, embodiments of the present disclosure relate to memory devices having a cross-point structure.
Description of Related Art
The integration of semiconductor memory devices has been increased as sizes of the electronic devices have been reduced. Thus, three-dimensional cross-point memory devices which include a plurality of memory cells disposed at intersection points of two electrodes crossing each other have been studied to be scaled down. However, in the down-scaling process, since thicknesses of layers used to form the three-dimensional cross-point array memory devices also are reduced, the layers exposed to high temperature processes can be easily damaged and degraded. Therefore, electrical characteristics of the three dimensional cross-point memory devices may be degraded.